B.Sc. Eng. (Hons) in Electronic and Telecommunication Engineering, First Class Honours
Jun 2021 – Jun 2025University of Moratuwa
Professional Profile
I am an Electronic & Telecommunication Engineering graduate (B.Sc. Eng. (Hons), First Class Honours) from the University of Moratuwa, Sri Lanka, where I now work as a Junior Lecturer. My research focuses on analog, mixed-signal and RF integrated circuit design: I have completed two silicon tapeouts in IHP SG13G2 130 nm BiCMOS using fully open-source EDA flows, and I am first author of a 2.4 GHz fractional-N PLL paper at SMACD 2026. I also work in embedded AI and machine learning, which draws me toward AI-assisted IC design as a longer-term research direction. I am looking for a PhD opportunity in these areas.
Education
Academic Background
Minor in Mathematics (Grades: A / A+)
Jun 2021 – Jun 2025University of Moratuwa
Human Resource Management
Sep 2019 – Mar 2020International Business Management Institute
Grade 1 – G.C.E Advanced Level
Jan 2005 – Aug 2019Mahajana College, Jaffna
Research
Publications
A 2.4 GHz LC-VCO Fractional-N Phase-Locked Loop Open-Source Design in 130-nm BiCMOS
SMACD 2026
Dresden, Germany - International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design
An Embedded Real-Time License Plate Recognition System for Complex Traffic Scenes
IEEE Intelligent Transportation Systems Conference (ITSC 2026)
Naples, Italy
Experience
Teaching & Research
Junior Lecturer
CurrentOct 2025 – PresentDept. of Electronic & Telecommunication Eng., University of Moratuwa
Conducts labs and tutorials for Analog & Digital Electronics and IC Design (Levels 2–4).
Visiting Lecturer
CurrentJul 2025 – PresentDept. of Electrical & Electronic Eng., Curtin University Colombo
Lectures the VLSI Design module (Level 4).
Temporary Instructor
Jul 2025 – Sep 2025Dept. of Electrical & Electronic Eng., University of Jaffna
Conducted labs for Analog & Digital Electronics (Levels 1 & 4).
Visiting Instructor
Jan 2025 – May 2025Dept. of Electronic & Telecommunication Eng., University of Moratuwa
Conducted labs for Analog Electronics (Level 2).
AI/ML Intern
Aug 2024 – Nov 2024iPartnerX Canada, Software Department
Assisted with development of the AI Interview Platform.
Graphic Designer
CurrentFeb 2024 – PresentCreative Gift Collections, Singapore
Visiting Research Student
Nov 2023 – May 2024Singapore University of Technology and Design (SUTD)
Developed physics-enhanced deep neural networks (PEDNNs) that replace PDE solvers with surrogate models for efficient soft-robotics simulation. Supervised by Prof. Pablo Valdivia y Alvarado.
Skills
