ECG Heart Monitor
Department of Electronic & Telecommunication Engineering, University of Moratuwa · March 2023
Overview
An ECG (electrocardiogram) heart monitor captures the electrical activity of the heart via skin-surface electrodes. This project implements a 3-lead ECG analog front-end that acquires low-magnitude cardiac signals (order of mV), amplifies them by ×1000 using op-amp stages, and filters noise — including the 50 Hz power-supply interference — to produce a clean ECG waveform. The output is displayed on a 128×64 OLED screen via an ATmega328P ADC digitisation circuit. Choosing a fully analog signal chain keeps the design simpler, cheaper, and more transparent than digital filter ICs, while also allowing easy filter-order adjustment.
Circuit Design
Signal Acquisition & Amplification
ECG electrode leads connect to an instrumentation-amplifier stage built with LM4562NA op-amps. Two LM4562NAs form the differential-input stage, rejecting common-mode noise (body motion, EMI). The third stage provides the final gain. Total amplification: ×1000. This brings the mV-level cardiac signal to a usable voltage range for display and digitisation.
Filtering (TL072 Op-Amps)
Four TL072 dual op-amps implement the analog filter chain:
- High-pass filter: removes DC offset and baseline wander (<0.5 Hz).
- Band-stop (notch) filter at 50 Hz: eliminates power-line interference injected through body capacitance. This was the most challenging part of the design.
- Low-pass filter: removes high-frequency noise above the ECG band (~150 Hz).
A ±12 V dual supply (from a 230 V→12 V step-down + regulator circuit) powers all op-amps.
PCB (Altium Designer)
95 mm × 87 mm single board, trace clearance 0.203 mm, trace width 0.381 mm, hole size 1 mm. Schematic, footprint, and 3D model verified before fabrication.
Enclosure (SolidWorks)
200 mm × 120 mm × 80 mm, 3 mm top/bottom walls, 5 mm side walls. Holes for ECG input leads, oscilloscope output, LED indicators, power switch, and four PCB mounting pillars.
ADC & Display (OLED)
The analog ECG output (≈4 V peak) is digitised by the ATmega328P's built-in 10-bit ADC and rendered as a scrolling waveform on the 128×64 OLED. The 4 V amplitude maps to 64 pixels (vertical). Pre-scaler 2 was used theoretically (minimum), but practically pre-scaler 8 is required — which limits the effective sampling rate and causes aliasing for ECG signals below 8 Hz. All rendering code was written by Sairisan.
ADC Circuit Components
Budget (Total: 11,925 LKR)
| Item | Qty | Total (LKR) |
|---|---|---|
| LM4562NA (Op-Amp) | 2 | 400 |
| TL072 (Op-Amp) | 4 | 400 |
| Resistors | 32 | 48 |
| 100 nF Capacitors | 10 | 100 |
| 22 µF Capacitors | 6 | 360 |
| Power Regulator | 2 | 300 |
| LED | 1 | 5 |
| Switch | 1 | 12 |
| Enclosure (SolidWorks + print) | 1 | 7,800 |
| PCB Fabrication | 1 | 1,000 |
| Power cable and others | — | 1,500 |
Results
The device successfully captured, amplified, and filtered a 3-lead ECG signal from a human body. The analog waveform was observed cleanly on an oscilloscope after ×1000 amplification and 50 Hz notch filtering. The ADC/OLED sub-circuit displayed the waveform in real time on the 128×64 screen. The complete PCB implementation was breadboard-prototyped first and then soldered and enclosed by all four team members.
Key challenge: Achieving effective 50 Hz rejection without attenuating the ECG signal itself required careful filter design and component selection (precision resistors and capacitors).
Contributions
| Member | Contributions |
|---|---|
| MANIMOHAN T. | SolidWorks Enclosure, Report, Demonstration Slides, Soldering, Assembling |
| AMARASINGHE Y.E | Circuit Simulation (LTspice), Soldering, Assembling |
| HAPUTHANTHRI H.H.A.M. | PCB Design, Soldering, Assembling |
| SAIRISAN R. | ADC Simulation (Proteus), Soldering, Assembling |
Supervisors: Ms. Prabhani, Mr. Sahan, Ms. Amashi
Overall Supervisors: Ms. Dinithi Fernando, Mr. Thilanka Udara, Mr. Sandun Ranasinghe, Dr. Sampath Perera
